RT-SIMEX
Atego is contributing with its real-time Java virtual machine, Aonix Perd Ultra SMP, expertise to enhance instrumentation and runtime traces uses, in a model driven development context.
About RT-SIMEX
RT-SIMEX – Retro-engineering of analysis Traces of real-time system SIMulation and EXecution
This project addresses the general challenge of improving methods and tools for the design of embedded software. Its goal is the development of techniques to relate different predictions and observations of real-time software behavior. Expected behavior is formalized in a design model: we will use the UML/MARTE profile, especially the non-functional properties annotations, and the time model. Observations are recorded by « execution traces », which are raw data to be processed, analyzed, correlated, and displayed in a convenient way, to provide designers with an adequate information amenable to verification, validation.
At design time, simulation techniques are quite appropriate to provide observation data, since computer resources are less constrained than in the nominal execution environment. Efficient simulation techniques are anyway needed, the best available techniques will be used. At integration time, embedded software is, by definition, more difficult to observe. Non intrusive mechanisms are required. Several execution environments will be exercised in different test cases: Real-time Java, general purpose processor running real-time Linux, microcontroller.
The right interpretation of data (accurate but low-level) provided by usual observation mechanisms of embedded software implies a context including knowledge regarding both the implementation of the software and the underlying execution platform; this is especially true for debug activities. For example, looking at a sequence of observed events, “causality” links are defined by a combination of the software structure (execution sequence in a process or thread) and operating system (possible pre-emption).
The proposed approach is to formalize the knowledge about software structure (ideally, it should come from a model based design process, possibly it can be statically reverse-engineered from code analysis), and exploit it in order to provide the user with high-level information appropriate for his testing, validation, or debug activities. A nice display of resulting information is essential for industrial acceptance. We plan to extend usual graphic representations of design models with annotations or animations to carry the appropriate information.
Beyond the exploitation of results through testing and debug tools, the techniques developed for analysis and synthesis of real-time observation data for design-time defects detection could be used at run-time for software health monitoring and transient failures detection. A possible area of application is embedded systems monitoring, e.g., “Flight Warning Function” in aircrafts.
To learn more about RT-SIMEX view the related links below.
